VM Embedded Systems Development


What is MEJ32 Virtual Processor Unit For Embedded Systems?

When provided in software, MEJ32 is a 32-bit virtual core optimized for various embedded systems processors including ARM Cortex-M, ARM Cortex-A, Renesas RX and V850, MIPS32, Infineon TriCore, and Tensilica Xtensa. When provided in hardware, it is a regular core IP, qualified as a VPU.

MEJ32 provides a unique Instruction Set Architecture (ISA). A tool, named SOAR, generates MEJ32 ISA code in ELF format, out of both the binary j2vm-v7 ISA code format, and the binary wasm-R2.0 code format. The SOAR also acts as a linker.

For hardware version of the MEJ32 core, please contact MicroEJ for availability.

See MEJ32 partNumbers and Supported Architectures

Trusted Multi-Sandbox Core

  • High speed execution engine (also called virtual machine when the engine is implemented in software, or VPU (Virtual Processor Unit) when the engine is implemented in hardware)
  • Canonical processor:
    • 32-bit processor (Variable Length Instruction Set)
    • 253 instructions
    • High code density
  • Built-in Multitasking Priority-based Operating System
  • Smart RAM optimizer:
    • Automatic memory management
    • No-fragmentation
    • Can be deterministic and/or incremental
  • Exception handling
  • Integration with many languages (Java, JS, Kotlin, C/ASM), etc.
  • Off-board ELF Linker, with optional on-board dynamic loader
  • SOAR tool to translate j2vm-v7 core Industrial Standard Architecture (ISA) to MEJ32 ISA (in order to run managed code: Java/Kotlin,Python/JS code)

Fast and Easy Port

  • “Green thread” integration to RTOS ➔ one timer needed
  • Holistic Low Power approach ➔ leverage Low Power SoC architectures
  • Available for all types of processors
  • Support in a few weeks for new CPU core ISA

Key Figures

  • Core Engine: <30 KB of Flash
  • Trusted Execution Environment (TEE) add-on (multi-sandbox)
  • RAM Footprint: <1.5 KB
  • Boot time: <2 ms
  • Software Implementation RTOS stack size: <1KB

Languages, Utilities & Test

  • Efficient cross language native interface
  • Utilities, logger, localization
  • Test suite harness (for HIL testing)
  • Performance traces: frame-per-second (FPS), CPU load (%), memory, threads

CPU & Power Management

  • Efficient power management schemes
  • Control of CPU and RAM allocation per app
  • App permissions control to access system resources

Memory Management

  • Smart RAM optimizer (garbage collector)
  • Management of MicroEJ objects lifecycle
  • No memory leaks or rogue pointers, no fragmentation
  • One shared C-Java heap (immortal objects)
  • Static objects in flash (immutable objects)

Components Management

  • Static and dynamic code loader
  • Binary app lifecycle & Sandboxing
  • Allowing inter-app communications

How Can I Know My Hardware Is Supported?

MicroEJ offers MICROEJ MEJ32 implementations for a wide range of popular hardware architectures. Examples of MICROEJ VEE are available for dedicated evaluation boards.
Follow the link below in order to find out if your hardware is supported and which MICROEJ VEE implementation is right for your project according to your processor core architecture and C tool chain.

Supported Architectures